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MOSA
MS6258
Gain And Attenuation Volume Controller IC
Gain and Attenuation Volume Controller IC 4 Sets of Stereo Input, Low voltage Gain and Attenuation 15~-79dB
FEATURES
Operation range: 2.7V~5.5V Low power consumption Gain/Attenuation: 15dB to -79dB at 1dB/step Good PSRR and low pop noise I2C interface Housed in 16 pin SOP, SSOP package
APPLICATIONS
Multimedia system Hi-Fi audio system MP3, PDA LCD Monitor
DESCRIPTION
The MS6258 is a stereo audio volume controller IC with 4 sets of stereo input. It uses CMOS technology specially for the low voltage application with low noise, rail-to-rail output. The MS6258 provide an I2C control interface with gain / attenuation range of 15dB to -79dB, 1dB/step. The initial condition is set to be maximum attenuation -79dB and mute on mode when the power on.
PIN CONFIGURATION
Symbol A.O. L-IN4 L-IN3 L-IN2 L-IN1 L-OUT VSS SDA SCL VDD R-OUT R-IN1 R-IN2 R-IN3 R-IN4 VREF Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
th
Description Address option * 4 left channel input 3rdleft channel input 2nd left channel input 1st left channel input Left channel output Ground I C data input I2C clock input Positive supply voltage Right channel output 1 right channel input 2nd right channel input 3 right channel input 4th right channel input Reference voltage = 1/2VDD
SDA 8 9 SCL
rd st 2
A.O.
1
16 VREF 15 R-IN4
L-IN4
2
L-IN3
3
14 R-IN3
L-IN2
4
MS6258
MS6258
13 R-IN2
L-IN1
5
12 R-IN1
L-OUT
6
11 R-OUT
VSS
7
10 VDD
Note: 1. Pin 1 is set to Lo or open , the address code is 88H (10001000B). 2. Pin 1 is set to Hi , the address code is 8CH (10001100B). 3. The VREF connects a capacitor to Vss.
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BLOCK DIAGRAM
L-IN1 L-IN2 L-IN3 L-IN4 1dB/STEP -1dB/STEP
MS6258
Gain And Attenuation Volume Controller IC
-10dB/STEP
L-OUT
Serial Bus Decoder and Latches
R-IN1 R-IN2 R-IN3 R-IN4
1dB/STEP
-1dB/STEP
-10dB/STEP REF
R-OUT
I2C Interface
Reference Circuit
SDA
SCL
VREF
ORDERING INFORMATION
Package 16-Pin SOP 16-Pin SOP 16-Pin SOP (lead free) 16-Pin SOP (lead free) 16-Pin SSOP 16-Pin SSOP 16-Pin SSOP (lead free) 16-Pin SSOP (lead free) Part number MS6258TR MS6258U MS6258GTR MS6258GU MS6258SSTR MS6258SSU MS6258SSGTR MS6258SSGU Packaging Marking MS6258AS MS6258AS MS6258ASG MS6258ASG MS6258 MS6258 MS6258G MS6258G Transport Media 2.5k Units Tape and Reel 50 Units Tube 2.5k Units Tape and Reel 50 Units Tube 2.5k Units Tape and Reel 100 Units Tube 2.5k Units Tape and Reel 100 Units Tube
ABSOLUTE MAXIMUM RATINGS
Symbol VDD VESD TSTG TA TJ TS RTHJA Supply Voltage Electrostatic Handling Storage Temperature Range Operating Ambient Temperature Range Maximum Junction Temperature Soldering Temperature, 10 seconds Thermal Resistance from Junction to Ambient in Free Air SOP16 SSOP16 Parameter Rating 6 -4500 to 4500 -65 to 150 -40 to 85 150 260 210 210 /W Unit V V
OPERATING RATINGS
Symbol VDD Supply Voltage Parameter Min 2.7 Typ Max 5.5 Unit V
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5V ELECTRICAL CHARACTERISTICS
MS6258
Gain And Attenuation Volume Controller IC
(VDD=5.0V, VSS=0V, Attenuation=0dB, Gain=0dB, f=1kHz, VO=0dBV, VREF Cap=10uF; unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit DC Characteristics IQ AGA ASTEP EGA EIGA CS PSRR MUTE Rin Rout Vo THD+N S/N VIH VIL Quiescent current Gain/Attenuation Gain/Attenuation step Gain/Attenuation step error Interchannel gin/attenuation error Channel separation Power supply rejection ratio Mute Attenuation Input Impedance Output Impedance Maximum output voltage swing Total harmonic distortion plus noise Signal-to-noise ratio Bus high input level Bus low input level VO=4.5Vpp (THD+N)/S < 0.1% Vripple = -20dBV, 100Hz Vin=0dBV Max gain Max attenuation 95 18 95 0.3VDD 3.8 15 -79 1 0.3 0.3 105 53 85 20 50 4.8 -69 100 4.2 100 -64 0.7VDD Vpp dB dB V V mA dB dB dB dB dB dB dB dB k
AC Characteristics
Bus Characteristics
3.3V ELECTRICAL CHARACTERISTICS
(VDD=3.3V, VSS=0V, Attenuation=0dB, Gain=0dB, f=1kHz, VO=-3dBV, VREF Cap=10uF; unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit DC Characteristics IQ CS PSRR MUTE Vo THD+N S/N Quiescent current Channel separation Power supply rejection ratio Mute Attenuation Maximum output voltage swing Total harmonic distortion plus noise Signal-to-noise ratio Vripple = -20dBV, 100Hz Vin=-3dBV (THD+N)/S < 0.1% 90 85 3.7 100 52 80 3 -69 90 4.1 -64 mA dB dB dB Vpp dB dB
AC Characteristics
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2.7V ELECTRICAL CHARACTERISTICS
MS6258
Gain And Attenuation Volume Controller IC
(VDD=2.7V, VSS=0V, Attenuation=0dB, Gain=0dB, f=1kHz, VO=-3dBV, VREF Cap=10uF; unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit DC Characteristics IQ CS PSRR MUTE Vo THD+N S/N Quiescent current Channel separation Power supply rejection ratio Mute Attenuation Maximum output voltage swing Total harmonic distortion plus noise Signal-to-noise ratio Vripple = -20dBV, 100Hz Vin=-3dBV (THD+N)/S < 0.3% 90 85 3.2 100 50 80 2 -69 90 3.6 -64 mA dB dB dB Vpp dB dB
AC Characteristics
TYPICAL PERFORMANCE CHARACTERISTICS
(Ta=25 , VREF Cap=10uF; unless otherwise specified)
f=20Hz
f=20Hz
f=20Hz
THD+N (%)
THD+N (%)
f=1kHz f=1kHz f=20kHz
f=20kHz
THD+N (%)
f=1kHz
f=20kHz
VDD=5V
VDD=3.3V
VDD=2.7V
OUTPUT VOLTAGE (dBV)
OUTPUT VOLTAGE (dBV)
OUTPUT VOLTAGE (dBV)
THD+N vs. output voltage
THD+N vs. output voltage
THD+N vs. output voltage
CHANNEL SEPARATION (dB)
VDD=2.7V VO=-3dBV
VDD=3.3V VO=-3dBV
VDD=5V VO=0dBV
VDD=5V VO=0dBV
VDD=3.3V VO=-3dBV
VDD=2.7V VO=-3dBV
FREQUENCY (Hz)
FREQUENCY (Hz)
QUIESCENT CURRENT (mA)
THD+N (%)
SUPPLY VOLTAGE (V)
THD+N vs. frequency
Channel separation vs. frequency
Quiescent current vs. supply voltage
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CAP=22uF CAP=22uF
MS6258
Gain And Attenuation Volume Controller IC
CAP=22uF
PSRR (dB)
PSRR (dB)
CAP=10uF
CAP=10uF
PSRR (dB)
CAP=10uF
CAP=2.2uF
CAP=2.2uF
CAP=2.2uF VDD=5V VRR=-20dBV VDD=3.3V VRR=-20dBV VDD=2.7V VRR=-20dBV
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
PSRR vs. frequency
PSRR vs. frequency
PSRR vs. frequency
I2C BUS DESCRIPTION
Start and stop conditions A start condition is activated when the SCL is set to HIGH and SDA shifts from HIGH to LOW state. The stop condition is activated when SCL is set to HIGH and SDA shifts from LOW to HIGH state. Please refer to the timing diagram below.
SCL
SDA
Start
Stop
SCL : Serial Clock Line, SDA : Serial Data Line
Data validity A data on the SDA line is considered valid and stable only when the SCL signal is in HIGH state. The HIGH and LOW states of the SDA line can only change when the SCL signal is LOW. Please refer to the figure below.
SDA
SCL Data line stable, Data valid Data change allowed
Byte format Every byte transmitted to the SDA line consists of 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transmitted first.
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Acknowledge
MS6258
Gain And Attenuation Volume Controller IC
During the Acknowledge clock pulse, the master (up) put a resistive HIGH level on the SDA line. The peripheral (audio processor) that acknowledges has to pull-down (LOW) the SDA line during the Acknowledge clock pulse so that the SDA line is in a stable LOW state during this clock pulse. Please refer to the diagram below.
SCL 1 2 3 7 8 9
SDA MSB Start Acknowledge
The audio processor that has been addressed has to generate an Acknowledge after receiving each byte, otherwise, the SDA line will remain at the HIGH level during the ninth (9th) clock pulse. In this case, the master transmitter can generate the STOP information in order to abort the transfer.
Timing of SDA and SCL bus lines
SDA tf SCL
tLOW
tr
tSU;DAT
tf
tHD;STA
tSP
tr
tBUF
S
tHD;STA
tHD;DAT
tHIGH
tSU;STA
Sr
tSU;STO
P
S
Standard mode Symbol fSCL tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tr tf tSU:STO tBUF Cb VnL VnH
Parameter
Min 0 4.0 4.7 4.0 4.7 0 250 4.0 4.7 -
Max 100 3.45 1000 300 400 -
Unit kHz us us us us us ns ns ns us us pF V V
SCL clock frequency Hold time (repeated) START condition. After this period, the first clock pulse is generated LOW period of the SCL clock HIGH period of the SCL clock Set-up time for a repeated START condition Data hold time: For I2C-bus devices Data-set-up time Rise time of both SDA and SCL signals Fall time of both SDA and SCL signals Set-up time for STOP condition Bus free time between a STOP and START condition Capacitive load for each bus line
Noise margin at the LOW level for each connected device (including 0.1VDD hysteresis) Noise margin at the HIGH level for each connected device (including 0.2VDD hysteresis)
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BUS INTERFACE
MS6258
Gain And Attenuation Volume Controller IC
Data are transmitted to and from the MCU to the MS6258 via the SDA and SCL. The SDA and SCL make up the BUS interface. It should be noted that pull-up resistors must be connected to the positive supply voltage.
VDD
Rp Rp
Pull up resistors
SDA (Serial Data Line)
SCL (Serial Clock Line)
MCU
MS6258
Interface protocol The format consists of the following A START condition A chip address byte including the MS6258 address. (7bits) The 8th bit of the byte must be "0".(write=0, read=1) MS6258 must always acknowledge the end of each transmitted byte. A data sequence (N-bytes + Acknowledge) A STOP condition
SDA
SCL
1-7
8
9
1-7
8
9
1-7
8
9
S START CONDITION ADDRESS R / -W ACK DATA ACK DATA ACK
P STOP CONDITION
Protocol Address Pin1(A.O.) = Low or Open
1 0 0 0 1 0 0 0 W 1
Pin1(A.O.) = High
0 0 0 1 1 0 0 W
7 bits address MS6258 address
7 bits address MS6258 address
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Data bytes description Function bits MSB 1 1 1 1 1 0 0 1 0 0 1 1 1 0 0 0 0 1 1 1 1 0 1 1 1 1 1 0 1 0 1 1 0 0 1 0 1 0 0 1 1 A3 0 A3 0 A3 0 C3 C3 C3 0 0 1 0 0 0 0 0 0 0 1 1 1 1 1 1 A2 B2 A2 B2 A2 B2 C2 C2 C2 0 0 0 0 0 0 0 1 A1 B1 A1 B1 A1 B1 C1 C1 C1 0 0 1 1 0 0 0 LSB 1 A0 B0 A0 B0 A0 B0 C0 C0 C0 0 1 0 1 1 1 0
MS6258
Gain And Attenuation Volume Controller IC
Function Function off (-79dB) 2-channel, -1dB/step 2-channel, -10dB/step Left channel, -1dB/step Left channel, -10dB/step Right channel, -1dB/step Right channel, -10dB/step 2-channel, +1dB/step Left channel, +1dB/step Right channel, +1dB/step Stereo1 Stereo2 Stereo3 Stereo4 Power off preparation (pop noise free) 2-channel, mute On 2-channel, mute Off
Gain / Attenuation bits A3 C3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 A2 B2 C2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A1 B1 C1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A0 B0 C0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 A 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 Gain / Attenuation value (dB) B 0 -10 -20 -30 -40 -50 -60 -70 C 0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +10 +11 +12 +13 +14 +15
1. Where Ax=-1dB/step, Bx=-10dB/step, Cx=+1dB/step 2. The function of power off preparation is to prevent pop noise when power off. 3. The initial condition is set to be maximum attenuation -79dB and mute on mode when the power on.
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Example
MSB Start 1 0 0 0 1 0 0 LSB 0 ACK 0 1 1 Data byte 1 1 0 0 0
MS6258
Gain And Attenuation Volume Controller IC
Mute off The initial condition is -79dB and mute on when power on. The first command must disable the mute function.
ACK
Stop
MS6258 address
2-ch, Mute off
Set gain of 2 channel at 0dB, and selected stereo 1 input.
Start MS6258 Address ACK 1 1 1 0 0 0 0 0 ACK 1 1 0 1 0 0 0 0 ACK
2-ch, -10dB/step, 0dB 1 1 0 0 0 0 0 0 ACK 0 1 0 0 0 0 0 0 ACK
2-ch, -1dB/step, 0dB Stop
2-ch, +1dB/step, 0dB
Stereo 1 input
Set gain of 2 channel at 6dB, and selected stereo 2 input. The value of attenuation must be set zero when the volume from attenuation to gain.
Start MS6258 Address ACK 1 1 1 0 0 0 0 0 ACK 1 1 0 1 0 0 0 0 ACK
2-ch, -10dB/step, 0dB 1 1 0 0 0 1 1 0 ACK 0 1 0 0 0 0 0 1 ACK
2-ch, -1dB/step, 0dB Stop
2-ch, +1dB/step, 6dB
Stereo 2 input
Set gain of 2 channel at -3dB, and selected stereo 3 input. The value of gain must be set zero when the volume from gain to attenuation.
Start MS6258 Address ACK 1 1 0 0 0 0 0 0 ACK 1 1 1 0 0 0 0 0 ACK
2-ch, +1dB/step, 0dB 1 1 0 1 0 0 1 1 ACK 0 1 0 0 0 0 1 0 ACK
2-ch, -10dB/step, 0dB Stop
2-ch, -1dB/step, -3dB
Stereo 3 input
Set attenuation of left channel at -33dB, and selected stereo 3 input.
Start MS6258 Address ACK 1 0 1 1 0 0 1 1 ACK 1 0 1 0 0 0 1 1 ACK
L-ch, -10dB/step, -30dB 1 1 0 1 0 0 1 1 ACK Stop
L-ch, -1dB/step, -3dB
Stereo 4 input
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APPLICATION INFORMATION
Basic application example
MS6258 8 MCU 9 SCL VSS A.O 10uF Stereo Signal 1 10uF 10uF Stereo Signal 2 10uF 10uF Stereo Signal 3 10uF 10uF Stereo Signal 4 10uF 5 7 10
MS6258
Gain And Attenuation Volume Controller IC
SDA
VDD
Supply 2.7~5V 0.1uF 47uF
1
Hi : Addr 10001000B Lo: Addr 10001100B
L-IN1
VREF
16 10uF
12 R-IN1 4 L-IN2 L-OUT 6
10uF 10k 11 10uF 10k
13 R-IN2 3 L-IN3
Power Amplifier
R-OUT
14 R-IN3 2 L-IN4
15 R-IN4
Basic application flowchart
Procedure Of Power On Procedure Of Power Off
Power on VDD = 5V
Volume Control volume down to -79 dB step by step
Initial Conditions function off (-79dB) mute on
Enable Mute Function mute on
Pop Noise Free wait 1 sec
Pop Noise Free power off preparation wait 0.5 sec
Disable Mute Function mute off
Power off VDD = 0V
Volume Control volume up/down step by step
1. The initial condition is -79dB and mute on when power on. 2. In order to prevent pop noise when power on, please wait 1 sec to transmit I2C command.
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EXTERNAL DIMENSIONS
SOP16
D
MS6258
Gain And Attenuation Volume Controller IC
Detail A
FH
Symbol A A1 B C e D H E L h
h x 45 C
A
Dimension in mm Dimension in inch Min Max Min Max 1.35 1.75 0.0532 0.0688 0.10 0.25 0.0040 0.0098 0.33 0.51 0.013 0.020 0.19 0.25 0.0075 0.0098 1.27 BSC 0.050 BSC 9.80 10.00 0.3859 0.3937 5.80 6.20 0.2284 0.2440 3.80 4.00 0.1497 0.1574 0.40 1.27 0.016 0.050 0.25 0.50 0.0099 0.0196 o o o 8 0 8o 0
e
B
A1 0.25mm
Detail A
L
SSOP16
D
Detail A
Symbol A A1 A2 b c e D E E1 L h L1 ZD R1 R 1 2
E1 E
H x 45 c ZD
A2 A 2 e b A1 1 R1 L1 R
Dimension in mm Dimension in inch Min Max Min Max 1.35 1.75 0.053 0.069 0.10 0.25 0.004 0.010 1.50 0.059 0.20 0.30 0.008 0.012 0.18 0.25 0.007 0.010 0.635 BASIC 0.025 BASIC 4.80 5.00 0.189 0.197 5.79 6.20 0.228 0.244 3.81 3.99 0.150 0.157 0.41 1.27 0.016 0.050 0.25 0.50 0.010 0.020 0.254 BASIC 0.010 BASIC 0.229 REF 0.009 REF 0.20 0.33 0.008 0.013 0.20 0.008 o o o 8 0 8o 0 0o 0o 15o 5o 15o 5o
Detail A
L
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TAPE AND REEL (Unit : mm)
SOP16
MS6258
Gain And Attenuation Volume Controller IC
2.00
1.0 4.00 1.50 MIN 1.5 +0.1/-0.0
0.30
0.5
A
R 0.3 MAX
1.75
1.0
7.5 10.30
0.1 16.0 0.3
2.10 6.50 SECTION A - A 8.00 R 0.5 TYP
A
SSOP16
2.0 0.30 0.05 4.0 1.75 0.3R MAX 5.5 0.05 12.0 0.3 5.4 0.05 1.5+0.1/-0.0 DIA
3.0 3.6 6.9
8.0 1.5 MIN 0.5 Radius Typical
2.0 1.7
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